In circuits such as bidirectional voltage translators where voltage translation is performed from an A port to a B port and vice versa, there is a need to detect transitions (e.g. high to low) at either port and then force the opposite port to the corresponding state. In general, the two signal lines being monitored will be referenced to different supply voltages (e.g. A port to 1.8V and B port to 5.0V). Once a transition occurs at either port, an internal logic signal must be generated, translated, and then used in driving the opposite port to the corresponding voltage level (completing the translation of the signal). In order to meet current market needs, the detection/translation circuit must have very low delay (on the order of 1 ns) and very low quiescent current (on the order of 0.5 uA)
Prior art circuits consume tens or hundreds of microamps of static supply current and/or have longer delay. Prior art circuits are shown in FIGS. 1 and 2. The prior art circuit shown in FIG. 1 is one half of a total detect/translate circuit. The circuit includes transistors MPa, MPb, MNa, and MNb; inverter INV; B-port Trigger Signal referenced to supply voltage VCCB of, for example, 5.0V; A-port Trigger Signal referenced to supply voltage VCCA of, for example, 1.8V; and output low-to-high. The prior art circuit shown in FIG. 2 is one fourth of a total detect/translate circuit. The circuit includes transistors MPc, MNc, MNd, MNe; inverter INV; resistor R1 of, for example, on the order of 100K ohms; B-port monitor; A-port Trigger Signal referenced to supply voltage VCCA of, for example, 1.8V; supply voltage VCCB; output A_low_to_high; and enable node EN. Neither of the prior art circuits has a true level translator in the path and as a result they consume much more dynamic ICC. An alternate approach would be to just translate the A signal to B levels before going into the transition detect circuit, but this method adds far too much delay to achieve the desired switching frequency across all the voltage combinations.